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Nicholas (Nick) Pianetto

Senior, Computer Engineering — Embedded hardware & firmware co‑design

I design and build embedded systems that bridge hardware and firmware. I’m a senior at Iowa State University (expected Dec 2026) with internship experience at Vermeer and Ag Leader and hands‑on projects using ESP32, STM32, and Lattice MachXO2 FPGA platforms. I enjoy working at the lowest level of firmware in C and love building my own PCBs in my free time, feel free to reach out and ask questions!

Selected Experience

  • Electrical Engineer Intern, Vermeer (May–Aug 2026) — Designed cable‑harness adapters, architected an automated CAN‑based wire‑harness tester with a Linux display, and developed an ESP32 wireless CAN test device to simplify off‑machine testing.
  • Embedded Design Intern, Ag Leader (May–Dec 2024) — Revised PCBs for ESD/EMC testing and designed a passive USB‑C board with impedance‑matched differential pairs for DisplayPort testing.
  • Circuits II Teaching Assistant, Iowa State (Jan–May 2026) — Mentored students in lab debugging and graded analog circuitry assignments.
  • Research Assistant, Iowa State (Jan 2025–May 2026) — Worked with the Animal Science Department to design a bioimpedance analyzer for animal research.

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